Earnings Recap — Q2 FY2026
CY Q3 2026 · Reported August 4, 2026 · Beat 0 of last 6 quarters
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Atomera's progress in gate-all-around, memory (DRAM and NAND), and GaN-on-silicon directly targets the AI infrastructure buildout's need for advanced logic, high-bandwidth memory, and efficient RF front ends. The company's MST technology could become a key enabler for next-generation AI chips and data center power/RF components, though it remains pre-revenue and dependent on customer adoption. The expanding TAM in NAND and GaN could significantly increase Atomera's addressable market if commercialized.
Atomera reported Q2 2026 revenue of $158,000, primarily from wafer deliveries to its large IDM customer, and a GAAP net loss of $6.3 million. The company passed a significant milestone with one of its two active gate-all-around customers, advancing manufacturability validation. In memory, they established a new value proposition for 4F2 DRAM and learned from a major NAND supplier that AI is driving need for planar periphery boost, opening a new TAM. In GaN, they announced RF data showing ~1,000x better linearity than GaN-on-silicon reference, approaching RF-SOI performance, and are now working with several new potential customers. Cash stood at $38.4 million, with no ATM sales during the quarter.
Management expressed strong momentum across all target markets, with a clear focus on converting technical milestones into commercial licenses. They highlighted a new value proposition for 4F2 DRAM and a new opportunity in NAND flash, which could more than double MST's TAM. In GaN, they believe the breakthrough RF data could catalyze a shift of some RF-SOI designs to GaN-on-silicon, positioning Atomera at the start of a new high-growth market. They noted that if GAA results are good, license negotiations could begin as early as late this year, but additional rounds could extend the timeline. CFO Francis Laurencio guided 2026 non-GAAP operating expenses to the high end of the $18.25M–$18.75M range, citing rising costs for tool leases, metrology, and device fabrication due to rapid semiconductor industry growth.
“We have shown that an MST starting wafer enables a vertical DRAM access transistor to be built using a next-generation DRAM fabrication process that is much cheaper than one of the most -- that most of the DRAM industry is currently pursuing.”
on 4F2 DRAM value proposition
“Just as important, these results approach the linearity and loss figures of advanced trap-rich RF-SOI, the technology RF designers typically reach for when they need this class of performance.”
on GaN-on-silicon RF breakthrough
“We have spent the last 5 years perfecting this value proposition for DRAM, and now it is applicable to NAND. If adopted by NAND flash manufacturers, this more than doubles the TAM for MST, which would obviously be very commercially significant.”
on NAND flash opportunity
On gate-all-around, you characterized that one of these customers has accepted a new material into their ecosystem. Can you convey the importance and difficulty of this, and describe the next steps?
Scott explained that the milestone involved demonstrating MST deposition in a GAA structure with positive electrical results. He compared the process to how equipment OEMs introduce new materials, noting that the next step for the customer would be to license MST and install it in their own fab for testing. He said they are already in discussions about license terms, and if results are good, it could lead to license negotiations as early as late this year, but additional rounds could stretch it by 9 months.
On DRAM, it sounds like the technology transition process has restarted an investigation and testing cycle. Is that a fair conclusion?
Scott confirmed that while the planar periphery value proposition remains strong, DRAM manufacturers are shifting focus to vertical scaling (4F2 and 3D DRAM) due to AI demand. He described a new value proposition where MST enables a cheaper fabrication process for vertical DRAM access transistors, validated through TCAD simulations and customer discussions, with results accepted at an IEEE conference in September.
On GaN, are you basically saying that people are now considering using GaN-on-silicon as a replacement for RF-SOI?
Scott said that RF-SOI is reaching its performance headroom and GaN is a promising path. He highlighted that MST-enabled GaN-on-silicon now approaches RF-SOI linearity and loss figures while offering higher power handling, potentially enabling fully integrated RF front ends including power amplifiers. He noted that this could shift some RF-SOI designs to GaN-on-silicon, and Atomera benefits either way.