Build the Machines That Make the Chip
Semiconductor Equipment
Supply Constraint
9/10How hard it is to add capacity in this layer. Suppliers, lead times, capital intensity, geographic concentration.
Demand Pull
8/10How much of this layer's revenue is AI-driven today and how fast that mix is growing.
ASML is a single point of failure for all advanced chips. 2-year lead times on EUV machines.
Layer Dependencies
ASML supplies EUV lithography exclusively to TSMC, Samsung, Intel. AMAT, LRCX, KLAC supply etch, deposition, and inspection equipment. Every chip manufactured in L04 depends on this equipment. ENTG (L03) supplies materials consumed by this equipment.
Deep Dive
This is the most concentrated layer in the entire supply chain. ASML is a single point of failure for every advanced chip on Earth. Their EUV lithography machines — which cost $380M each and take 18 months to build — are the only way to pattern transistors at 3nm and below. TSMC, Samsung, and Intel are ASML's only three customers for high-NA EUV. If ASML's Veldhoven facility were disrupted, the world's advanced chip production would halt within months.
The Packaging Bottleneck trend bites hardest at the intersection of L02 and L05. TSMC's CoWoS advanced packaging requires lithographic patterning of silicon interposers — using the same equipment categories (though at less aggressive nodes) as front-end fab. This means advanced packaging competes with chip manufacturing for equipment time at Applied Materials, Lam Research, and KLA.
Tokyo Electron supplies the other critical equipment category: coaters and developers that apply and process photoresist. The Japanese materials dominance we see throughout the supply chain begins here. Shin-Etsu and SUMCO supply the 300mm silicon wafers that go into every tool in this layer. Without their ultra-pure silicon, no wafer starts.
The structural insight: every AI trend we track — memory, packaging, power, custom silicon — ultimately routes through this layer's equipment. A 30% increase in AI chip demand doesn't require 30% more equipment if utilization is already high. It requires lead-time allocation that TSMC, Samsung, and Intel fight over quarterly. Equipment delivery schedules are the real constraint calendar for the industry.
ASML is a literal single point of failure for all advanced AI chips. EUV machine lead times of 18+ months make capacity expansion slow by construction.
Companies in This Layer
The only company on earth manufacturing EUV lithography machines. $350M each. No ASML = no chips at 7nm and below. Absolute physical monopoly.
Largest semiconductor equipment company by revenue. Supplies deposition, etch, CMP, and inspection systems to every advanced fab.
Dominant in etch and deposition equipment. Every chip layer at TSMC passes through Lam tools.
Process control and inspection equipment. Ensures chip quality at every manufacturing step. Defect detection monopoly at advanced nodes.
Japan's largest semiconductor equipment maker. Coater/developer, deposition, etch. Essential equipment for every major fab.
Specialty inspection and metrology for advanced packaging. Growing importance as CoWoS/chiplet architectures expand.
Automated test equipment (ATE) leader. Tests every chip after fabrication. Growing AI chip testing demand.
Ion implantation equipment. Critical step in chip manufacturing. Merging with Veeco ($4.4B).
Designs and manufactures critical gas and chemical delivery subsystems used inside every major semiconductor equipment tool from AMAT, LRCX, and others.
Semiconductor equipment subsystems, parts cleaning, and analytical services — the plumbing behind every AMAT, LRCX, and TEL tool plus fab contamination control.
Precision motion, photonics, and vision components — sole-source supplier of air bearing spindles for GPU board drilling, plus robotics/automation subsystems.
Process control instruments, lasers, and vacuum technology for semiconductor fabs — the measurement and control backbone of every deposition and etch chamber.
Semiconductor and networking test and measurement equipment
Precision power conversion for semiconductor fabs and data centers